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Meet Us at the Microchip Mi-V Virtual Summit

Jul 19, 2021

Meet Enclustra at the first Mi-V Virtual Summit Conference – July 21-22. This event is a technology showcase that will bring together an esteemed group of innovators, academics, clients and collaborators.

Enclustra will present the Mercury+ MP1, it's first PolarFire SoC FPGA based system-on-module (SOM). Don't miss the presentation «Shorten Time-to-Market With an Enclustra System on Module» on July 22nd at 12:45 p.m. PDT to get all the details.

The Mi-V Virtual Summit Conference will deliver valuable information about solutions, hardware, tools and Intellectual Property (IP) that are available for the PolarFire SoC FPGA family. The Mi-V Virtual Summit Conference will deliver engaging and high-quality content. You can look forward to participating in:

  • Panel discussions
  • Paper presentations
  • Solution demos
  • Keynote presentations
  • A virtual tradeshow floor

Join the PolarFire SoC revolution and register to attend the Mi-V Virtual Summit today.

Linux Is Not Rocket Science

Jul 15, 2021

The Enclustra Build Environment (EBE) makes building the Linux-based Board Support Package (BSP) a snap.

Thanks to the Enclustra Build Environment (EBE), compiling Linux and building a Board-Support-Package (BSP) is not rocket science anymore. The EBE is a tool which allows you to quickly set up and run any Enclustra module running a Xilinx Zynq (UltraScale+ MPSoC) device. You only need to select the desired target and the tool downloads all the required binaries, such as the bitstream and FSBL. It also downloads and compiles software such as U-Boot, Linux, and a Buildroot-based root file system – all with a push of a button. For automating the build process, besides the GUI mode a command line interface is also available.

We just updated the tool to support Xilinx Vivado 2020.1 and also the very powerful Mercury+ XU9 SOM and the new Mercury+ ST1 base board. Check it out yourself: Compile Linux now.

If you prefer petalinux, we have got you covered too: Jumpstart with our PetaLinux based Board Support Packages.

We Now Speak Chinese - 我们可以说中文了!

Jun 29, 2021

Universal DSP Library

Enclustra is further strengthening its growing Asia site, located in Shenzhen, China. To better support our customers in China, Enclustra just published a dedicated Website in Chinese.

为了更好的为我们位于中国的客户提供支持,同时为了进一步支持持续发展中的位于中国深圳的亚洲分公司,Enclustra (瑞苏盈科)刚刚发布了中文专用网站。

Whether you are looking for a Xilinx- or Intel- (Altera-) based FPGA or SoC module (System-on-Module/SOM): Enclustra has it covered. You can find all relevant and technical information well arranged on www.enclustra.com.cn. Also, the user manuals and all important information needed to design-in an Enclustra module into your application are available.

无论您是在寻找基于Xilinx或是Intel(Altera)的FPGA或 SoC 核心板/开发板 - Enclustra(瑞苏盈科)都可以为您提供。您可以到我们的中文网站www.enclustra.com.cn找到全部相关的技术信息。同时用户手册和使用Enclustra模块做应用设计开发的全部重要的信息也都可以从中文网站上获得。

To shorten time-to-market as much as possible, Enclustra offers broad design-in support for their products and a comprehensive ecosystem, offering all required hardware, software and support materials. Detailed documentation and reference designs make it easy to get started. A user manual, user schematics, a 3D-model, PCB footprints and differential I/O length tables and the Linux-based Board Support Package (BSP) are all provided. In combination with ready-made base boards and heatsinks, developing an FPGA project has never been easier.

为了尽可能地帮助您缩短产品的研发上市时间,Enclustra(瑞苏盈科)同时提供基于我们产品的全方位的研发设计服务以及完整的开发生态系统,其中包括全部的硬件,软件和支持资源。详细的文档和参考设计使得开始产品开发变得容易。用户手册,原理图,3D 模型, PCB封装配置以及差分I/O表和基于Linux的支持包(BSP)全部都为您提供。结合现成的底板/开发板和散热器,开发FPGA项目从未像现在这么简单。

Visit our new China website and start your FPGA based project today: www.enclustra.com.cn.
Or send us an email: 许广源, 销售经理,大中华区

请访问我们的中文网站并即刻开启您的FPGA项目: www.enclustra.com.cn

或发邮件给我们: 许广源, 销售经理,大中华区

Heute um 14:45 Uhr: Vortrag «Das passende Modul für jeden»

Jun 21, 2021

hema vision days 2021

Individuelle Projektgespräche zu neuen Technologien und Workshops zur Anwendung in der Praxis: Die VISION DAYS vom
21. –24 Juni 2021 (Digital)

Geht es Ihnen mit Gummistiefeln auch so: Entweder sind sie zu gross oder zu klein? Damit das bei Ihren FPGA System-on-Modulen (SOM) nicht passiert, bietet Enclustra eine breite Palette von Pin kompatiblen Xilinx Zynq UltraScale+ Modulen an. Auf der Plattformebene (Betriebssystem, Schnittstellen, etc. ) verhalten sie sich alle identisch – das hilft, die Entwicklungskosten und Risiken zu senken und die Markteinführung Ihrer Produkte zu beschleunigen.

Der Vortrag «Das passende Modul für jeden – FPGA- und SoC-Module» um 14:45 Uhr am 21. Juni 2021 gibt Antworten auf die heutigen Herausforderungen bei der Entwicklung von Embedded Systemen. Melden Sie sich jetzt an, es hat noch freie Plätze: Kostenlose Anmeldung.

Unter anderem folgende Themen erwarten Sie an den VISION DAYS:

  • Schneller am Markt mit modularen Elektroniken
  • Partner-Session mit Enclustra GmbH: Das passende Modul für jeden - FPGA- und SoC-Module
  • Stärken kombinieren: Die Zukunft des Embedded Vision Systemdesigns
  • Partner-Session mit Xilinx: Edge-AI - Zukunftstechnologie oder unumgänglich für die Industrie?
  • Schweissprozess-Visualisierung: so sichert die Daimler AG Qualität und Prozesssicherheit in der Karosserie-Produktion
Sehen Sie sich das gesamte Program (Pdf) an.

Wir freuen uns darauf, Sie an den VISION DAYS begrüssen zu dürfen.

New IP Solution: Universal DSP Library

Jun 07, 2021

Universal DSP Library

Enclustra’s brand new Universal DSP Library provides efficient FPGA implementations of the most common digital signal processing components, such as FIR and CIC filters, mixers, CORDIC and function approximations. It also provides the necessary glue logic needed to connect DSP systems together, such as multiplexers, stream splitters, buffers, TDM-parallel converters and fixed-point format converters.

The main emphasis is on minimizing development time. Every component is provided not only in raw VHDL source code, but also as a Xilinx Vivado IPI block. This allows signal processing chains to be built rapidly using Vivado’s Block Design GUI, or by direct VHDL instantiation.

To further simplify and speed up development, the DSP Library also contains bit-true simulation models based on an open-source Python framework. This allows the exact functionality to be tested, simulated, and optimized with the full power and ease of Python.

Do you like to know more? Read all the details.

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