Mercury+ XU7 & XU8: a great deal of bandwidth

Enclustra has started to develop two SoC modules optimized for high bandwidths and large volumes of data. The Mercury+ XU7 and Mercury+ XU8 are based on the Xilinx Zynq UltraScale+ MPSoC and come equipped with 20 multi-gigabit transceivers, each with a data transfer rate of up to 15 Gbps.

In order to be able to efficiently buffer the high volumes of data, the PL has its own 32-bit memory and up to 4 GByte DDR4 SDRAM. When combined with up to 8 GByte DDR4 ECC SDRAM connected directly to the processing system, this allows for 29.8 GByte/sec memory bandwidth.

In addition to six ARM cores, the 74 × 54 mm modules feature a Mali 400MP2 GPU, 16 GByte eMMC flash memory, USB 3.0 and 236 user I/Os. The EV variants of the Mercury+ XU8 also come equipped with a H.264/H.265 video codec.

Linux BSP at the touch of a button

Using the Enclustra Build Environment (EBE), Linux can be compiled and the Board Support Package (BSP) created in no time at all for every Enclustra SoC module with an integrated ARM^® processor – for both Intel^® and Xilinx-based modules.

All you need to do is select the module and base board via a graphical user interface, and then the Enclustra Build Environment downloads the appropriate bitstream, First Stage Boot Loader (FSBL) and the requisite source codes. Once this has been done, U-Boot, Linux and the root file system based on BusyBox are compiled and ready to go. The EBE now also supports the latest Enclustra SoC modules – i.e. the Mercury+ AA1, Mercury+ XU1, Mars MA3 and Mars XU3 modules.

Mercury XU5 – more interfaces for the PL

Enclustra’s latest SoC module based on Xilinx Zynq^® UltraScale^™+ is in development. The Mercury XU5 features more direct interfaces to the FPGA fabric, in addition to a Gigabit Ethernet connection as well as up to 2 GByte DDR4 SDRAM. The module also has up to 8 GByte DDR4 ECC SDRAM connected directly to the processing system and a Gigabit Ethernet interface. Both the processing system and the FPGA matrix boast an up to four lanes PCIe^® Gen2/3 connection.

In addition to six ARM cores, the 56 × 54 mm module features a Mali^™400MP2 GPU, an H.264/H.265 video codec (for EV variants), 16 GByte eMMC flash memory, USB 3.0 and 178 User I/Os.

FPGA Kongress 2018

FPGA technologies have made a huge evolutionary leap, now, requiring new approaches and solutions from both hardware and software developers. The FPGA Congress 2018, which will take place from the 12.-14. of June 2018 in Munich, focuses on user-friendly solutions that can quickly be integrated into your own development processes.

Enclustra will exhibit the latest products like the Xilinx UltraScale+ MPSoC based Mercury XU5 and give an interesting lecture about the challenges when linking a FPGA to a high level language and how they can be solved. The speech called «Das universelle PCIe, USB und Ethernet Kommunikationspaket für FPGAs» is taking place at 11:15 on day 2. We are looking forward to meet you in Munich.

An easy way to sweeten your day

In order to be able to adapt our modules even more precisely to your requirements, we've rustled up a survey. Aptly titled "Your ideal module survey", with your valuable input you can help shape the development of the next generation of modules. As a thank you for your participation, you'll receive some delicious Swiss chocolate – click through to bag your bar.