How to run eCos on the Mercury ZX1 Zynq module

Our friends from Antmicro have ported the free and open source eCos operating system to run on the Mercury ZX1 SoC module, allowing users to harness the power of the module's ARM A-9 in tandem with the real-time capabilities of eCos.

Have a look here: How to run eCos on Enclustra’s Mercury ZX1 Zynq module

As you may have noticed, enclustra.com was offline for unscheduled maintenance for parts of yesterday and this morning - we're back up and running now. Thanks for your patience - we're sorry for the inconvenience, and invite you round to Enclustra HQ for a hot beverage of your choice (we are, however, currently out of chai).

As always, if there's anything we can help you with, drop us a line.

PLC2 am 16. Juni 2015: Mit FPGA-Modulen von der Entwicklung bis zur Serienfertigung

Enclustra wird am 16. Juni 2015 an den ALL PROGRAMMABLE PLC2 Days einen spannenden Vortrag halten, der die zahlreichen Vorteile von Standard FPGA-Modulen aufzeigt, wie kürzere Time-to-Market, grössere Design-Flexibilität spät im Entwicklungsprozess, Skalierbarkeit oder eine hohe Zukunftssicherheit. Werfen Sie einen Blick in das spannende Tagesprogramm: PLC2 Konferenzprogramm

Club Vivado: Successful development of IP cores for Vivado IP Integrator

Enclustra was invited to the Xilinx Club Vivado Users Group event in Stuttgart and was asked to give a presentation related to Vivado. What was the presentation all about? Have a look here: Successful Development of IP Cores for Vivado™ IP Integrator

Presentation: MATLAB® and Simulink® in the FPGA design process

Enclustra and MathWorks held an exclusive Seminar in Zurich: Simplify Software and Hardware Co-Design with MATLAB. Enclustra and MathWorks engineers illustrated how algorithms can be easily prototyped and then implemented on FPGAs, ASICs, MCUs, DSPs and SoCs (Xilinx Zynq, Altera SoC), simplifying and accelerating the implementation of your applications. Did you miss the event? Download the Enclustra presentation here: MATLAB® and Simulink® in the FPGA design process