How to connect a high level programming language to an FPGA

Our FPGA/SoC Development Engineer Matthias Frei held a speech at the FPGA Kongress in Munich on the Universal connection between an FPGA and a high-level programming language. In the speech he breaks down the reasons, requirements and challenges when linking an FPGA to a high-level language. Additionally, he explains why a standard solution makes sense and what the FPGA Manager IP Solution is.

If you missed the speech, go visit Enclustra’s Publication & Talks site and read more about it: Publications

Xilinx UltraScale+ MPSoC as application accelerator

At the Embedded Computing Conference, our FPGA/SoC Development Engineer Matthias Frei spoke on the Xilinx UltraScale+ MPSoC as application accelerator. In the speech he introduces the Mandelbrot set and its calculation as well as how to best map it onto the Enlcustra Mercury+ XU1 MPSoC.

Detailed information can be found in the following link: Publications

Reaching for the stars

The KIPP nanosatellite from Kepler Communications measures approximately 10×10×30 cm and is equipped with an FPGA module from Enclustra. The module was a key piece of the puzzle for realizing a high level of functionality with low power consumption in such a small design

If you want to track the whereabouts of the Enclustra module in space, simply click this link to find out.

The Mercury XU5 has arrived

Enclustra’s latest SoC module based on Xilinx Zynq^® UltraScale^™+ has just arrived from assembly. The Mercury XU5 features more direct interfaces to the FPGA fabric, in addition to a Gigabit Ethernet connection as well as up to 2 GByte DDR4 SDRAM. The module also has up to 8 GByte DDR4 ECC SDRAM connected directly to the processing system and a Gigabit Ethernet interface. Both the processing system and the FPGA matrix boast an up to four lanes PCIe^® Gen2/3 connection.

In addition to six ARM cores, the 56 × 54 mm module features a Mali^™400MP2 GPU, an H.264/H.265 video codec (for EV variants), 16 GByte eMMC flash memory, USB 3.0 and 178 User I/Os.

Mercury+ XU7 & XU8: a great deal of bandwidth

Enclustra has started to develop two SoC modules optimized for high bandwidths and large volumes of data. The Mercury+ XU7 and Mercury+ XU8 are based on the Xilinx Zynq UltraScale+ MPSoC and come equipped with 20 multi-gigabit transceivers, each with a data transfer rate of up to 15 Gbps.

In order to be able to efficiently buffer the high volumes of data, the PL has its own 32-bit memory and up to 4 GByte DDR4 SDRAM. When combined with up to 8 GByte DDR4 ECC SDRAM connected directly to the processing system, this allows for 29.8 GByte/sec memory bandwidth.

In addition to six ARM cores, the 74 × 54 mm modules feature a Mali 400MP2 GPU, 16 GByte eMMC flash memory, USB 3.0 and 236 user I/Os. The EV variants of the Mercury+ XU8 also come equipped with a H.264/H.265 video codec.