Virtual FIFO, the smart way

The Stream Buffer Controller IP Core is optimized for FPGAs and implements a versatile Stream to Memory Mapped DMA bridge with up to 16 independent streams. The IP core allows data buffering in an external memory device to provide virtual FIFO capability with up to 4 GByte memory size. It provides an AMBA AXI4-Stream interface for each write and read data stream. A common memory-mapped master interface (AXI4 or Avalon) is provided to access the external memory device.

The IP core is highly configurable in terms of operation mode, buffer size and buffer address for each stream. The configuration is done over a memory-mapped slave interface, either by an embedded CPU, an FPGA Manager application or an application-specific stream configurator controller in VHDL. Get all the details: More info >

Motion control, in the fast lane

The modular Universal Drive Controller IP Core includes everything needed to control up to eight axes (i.e. motors) at control rates above 200 kHz, from the A/D converter interface to position, velocity and current controllers, position detection via encoder or resolver and control logic for power stages. DC, BLDC and 2- or 3-phase stepper motors are supported. Field-oriented control is available for brushless (BLDC) motors, and microstepping is supported for stepper motors.

A software API allows to access all functionality of the Universal Drive Controller without having to know the exact layout of the register bank and the meaning of each field within every register. The API is written in ANSI-C and can be ported to different CPU architectures easily or used in device drivers.

Thanks to the Evaluation Kit for Intel and Xilinx FPGAs it's a snap to add drive controller capabilities to any FPGA design. The kit provides a full featured design platform to build motion control applications. It provides an out-of-the box hardware platform with reference design, to reduce development time and allow you to focus on your target application — get all the details: More info >

Mercury XU5: the cost-effective UltraScale+ SoC module

The Mercury XU5 SoC module from Enclustra is an extremely powerful and cost-effective all-rounder. Based on the Xilinx Zynq UltraScale+ MPSoC, it features 6 ARM cores, a Mali 400MP2 GPU (EG/EV variants), up to 10 GByte of extremely fast DDR4 SDRAM, numerous standard interfaces, 178 user I/Os and up to 256,000 LUT4 equivalents.

The FPGA Board, with dimensions of just 56 × 54 mm, has 16 GByte eMMC flash memory as well as various standard interfaces, such as Gigabit Ethernet, USB 3.0, a display port, SATA and SGMII. Both the processing system and the FPGA matrix boast four PCIe Gen2/3 connections.

A System-on-Module (SOM) like the Mercury XU5 helps to reduce time-to-market and development risks. SOMs offer many advantages over chip-down designs. The high production quantity of off-the-shelf FPGA or SoC modules reduce their cost and at the same time provides a proven and reliable solution. Since different pin-compatible modules are available in the same form factor, a product can be easily equipped with a more powerful module if needed.

Thanks to the high functional density of the FPGA modules, the complexity of the base board is reduced, making it faster and less expensive to develop and produce. In combination with the Mercury+ ST1 or Mercury+ PE1 base boards, the Mercury XU5 constitutes a powerful development and prototyping platform that helps to reduce time-to-market by up to 12 month. Get all the details: More info >

Start your FPGA project today

To shorten time-to-market and reduce development costs, it is essential for a company to concentrate on its core competencies and know-how. No one can afford to waste precious time reinventing the wheel or debugging the integration of an IP Core that doesn’t work as expected.

That’s exactly where Enclustra can help to accelerate and smoothen the development process. Enclustra develops and sells it’s own off-the-shelf FPGA/SoC modules and IP Solutions and offers development services to customers – since more than 15 Years.

Enclustra always seeks the ideal solutions at minimal expense. If beneficial, we use an FPGA- or SoC-Module as well as IP Cores – also from third parties. This helps to shorten development time and free up engineering capacity to solve the application-specific challenges.

Send us your specification and get your free quotation within a couple of days:

Let your vision system come true

Are you looking for an optimal solution for your FPGA-based vision system? Then get in contact with Nicolai Kroner, our new sales engineer in Germany. Thanks to the combination of a standard System on Module (SOM) from Enclustra with the long-standing vision and baseboard know-how from hema electronic we are able to develop vision systems in the shortest amount of time.

Modular concepts, building block systems and platform technologies offer better development processes and ultimately more successful products.

We are looking forward to supporting you: Get in Contact