Agile RF Source for trapped ion experiments

For a customer we developed a Agile RF Source for trapped ion experiments. The Xilinx Spartan-6 based RF source provides multiple DDS channels for modulating the frequency, phase and amplitude of laser light used in the experiments. Also available are feedback channels for monitoring the light intensity at another point in the system and thus being able to measure the experimental noise and drift introduced by the optical components.

We took the existing PCB design and brushed it up to make it ready for the modifications and extension to come. Furthermore, we implemented the first evolution as planned in the roadmap, enabling even more sophisticated experiments. Let's get quantum computing started!

Click through to read more about some of our customer projects.

Motion Control Kit for Intel FPGAs

The tried-and-tested Enclustra BLDC Evaluation Kit is now also available for Intel FPGAs. In addition to an evaluation license for the Universal Drive Controller IP Core from a Mercury SA1 SoC module, which is based on an Intel Cyclone^® V SoC, the Kit also includes a Mercury+ PE1-200 base board, an FMC-DR2 power electronics card and a Maxon BLDC Motor with MR encoder

Set lock times for high and low-side switches so that they are accurate to just a few nanoseconds or PWM and control frequencies to an accuracy of a few hundred Kilohertz without any jitter: all of this is possible thanks to our Universal Drive Controller IP Core, which supports DC, BLDC and 2 and 3-phase stepper motors.

PCI Express to Wishbone Bridge

We were asked to migrate the SPI slave interfaces of an existing FPGA design to PCIe interfaces, providing massively more bandwidth, while maintaining the internal FPGA Wishbone communication infrastructure and as much as possible of the embedded software controlling the SPI masters. To do this, we replaced the SPI slave interfaces with a multi-function PCIe endpoint with attached Wishbone masters, and mapped the new FPGA design to an Altera Cyclone V GX device.

On the embedded software side, the low-level SPI driver was replaced by a custom PCIe driver, emulating the same behavior. This development provided our customer with a smooth transition to the latest FPGA technology, and delivers the performance required for next-generation systems.

Click through to read more about some of our customer projects.

The first SO-DIMM Zynq UltraScale+ Module is on its way

We've just got our hands on the PCBs for the Mars XU3 Xilinx Zynq UltraScale+ module, have shipped them off to assembly, and are eager to get them back in a few weeks. The XU3 comes in the extremely compact and well-established SO-DIMM form factor, and is optimized for applications that require the greatest processing power possible in the smallest of spaces, without having to make any compromises when it comes to functionality.

On offer are up to 154,000 systems logic cells, 108 user I/Os, 6 ARM^® processors, a GPU, up to 4 GByte of ultra-fast DDR4 SDRAM, 64 MByte QSPI flash memory, 4 GByte eMMC flash memory and Gigabit Ethernet and USB 2.0/3.0 ports, all on a surface area measuring just 67.6 × 30 mm. Additionally, in order to ensure that the design-in process is as simple as possible, the module only requires a single 3.3 V feed for the power supply.

Meet us at Embedded Eorld 2017

From the 14^th to the 16^th of March 2017, the Nuremburg Exhibition Centre will be dedicated to all things related to embedded systems. Enclustra will once again be present at Embedded World, with two stands, together with AntMicro, the specialist for embedded software. Mark the dates on your calendar and come visit us at Stand 121 in Hall 4A or Stand 101 in Hall 1 at the world's largest trade fair and congress dedicated to embedded technologies.