Ultra fast SoC design with Visual System Integrator
Visual System Integrator, from System View is a graphical extension to the Xilinx® Vivado® suite for the development of complex embedded systems. The tool supports most Xilinx FPGAs and SoCs, as well as Windows and embedded Linux. After rendering the hardware platform setup, the tool automatically generates the needed interconnects: PCIe, AXI-MM, AXI-Stream, Ethernet and Aurora interfaces are all supported.
The first official release of VSI is available now for evaluation – a quick search online will lead you to a few videos showing the graphical user interface and example applications in action. The graphical user interface the system designer, to drag-and-drop functional blocks between CPUs and FPGAs, and generate the new bitstreams and binaries with just a few clicks.
Free seminar: Getting started with Xilinx Zynq SoC
Enclustra and Avnet SILICA are arranging a free seminar on the SoC design integration.
Don’t miss how engineers from Avnet SILICA and Enclustra illustrate how you can utilize the full performance of a SoC, even with minimal VHDL and FPGA know-how. If you’re working with microcontrollers, DSPs, SoCs and FPGAs – you should join us! Learn for which applications SoCs are good for, how you can shorten your development time, which tools are required and many more interesting things.
Eager to learn? Klick on the link below and sign up for the seminar on April 26th.
See you there!
Incredible floating point performance, incredible price
The Mercury+ AA1 SoC module, based on the Intel Arria 10 SoC, offers up to 480,000 system logic cells and an extremely juicy amount of performance at a very tasty price point. In addition to its integrated dual-core ARM processor, the module offers up to 286 user I/Os, and 12 multi-gigabit transceivers each offer a data transfer rate of up to 12.5 Gbps. Interfaces for USB 3.0, PCIe Gen3 ×4/Gen2 ×8 and Gigabit Ethernet make the module suitable for almost all applications. Its fast DDR4 SDRAM with a bandwidth of 9.6 GByte/sec and ECC also means that it's well suited for application that require the utmost data integrity.
Agile RF Source for trapped ion experiments
For a customer we developed a Agile RF Source for trapped ion experiments. The Xilinx Spartan-6 based RF source provides multiple DDS channels for modulating the frequency, phase and amplitude of laser light used in the experiments. Also available are feedback channels for monitoring the light intensity at another point in the system and thus being able to measure the experimental noise and drift introduced by the optical components.
We took the existing PCB design and brushed it up to make it ready for the modifications and extension to come. Furthermore, we implemented the first evolution as planned in the roadmap, enabling even more sophisticated experiments. Let's get quantum computing started!
Motion Control Kit for Intel FPGAs
The tried-and-tested Enclustra BLDC Evaluation Kit is now also available for Intel FPGAs. In addition to an evaluation license for the Universal Drive Controller IP Core from a Mercury SA1 SoC module, which is based on an Intel Cyclone® V SoC, the Kit also includes a Mercury+ PE1-200 base board, an FMC-DR2 power electronics card and a Maxon BLDC Motor with MR encoder
Set lock times for high and low-side switches so that they are accurate to just a few nanoseconds or PWM and control frequencies to an accuracy of a few hundred Kilohertz without any jitter: all of this is possible thanks to our Universal Drive Controller IP Core, which supports DC, BLDC and 2 and 3-phase stepper motors.
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