FpgaManager  1.31
Software API Documentation
FPGA Manager Software API

Release History

Version Date Comments
1.00 18.10.2013 First Release
1.01 23.10.2013 Fixed USB 2.0 implementation
Set don't fragment flag for UDP implementation to prevent fragmented packet from arriving at the FPGA.
1.10 16.12.2013 Added USB 3.0 FX3 implementation (16-bit only, 32-bit mode not yet implemented)
1.11 07.01.2014 Fixed multi-trheading related bugs for Memory Mapped Access
1.12 10.01.2014 Added property to set the number of open Memory Mapped Transfers
1.13 13.02.2014 Fixed semaphore bug occuring after some billions of transfers
1.14 10.03.2014 Fixed FX3 bug caused by FX3 auto firmware download
1.15 18.03.2014 Added packet loss detection for memory mapped access
1.16 12.05.2014 Implemented synchronous mode for streams and use it for MmAccess
Property for Upstream PacketRate
1.17 17.05.2014 Bugfix for UpPktRate values > 255 us
Implemented Keep-Alive packets
MmAccesses are now always aligned to DWORD boundaries
Fixed dead-lock for MmAccess
Solved MmAccess performance bottleneck
Fixed wrong error message "Data Inconsistence"
1.18 29.07.2014 Bugfix for C# interface issue with GetFrameNumber()
Added PCIe implementation
1.19 03.11.2014 New C# reference application with measurement capabilities
Improved UDP downstream performance for Windows implementation
Bugfix for Memory-Mapped operations to non DWORD-aligned addresses
Bugfix for missing callbacks when executing many send operations for small transfers very fast
1.20 03.02.2015 Exceptions in user callbacks are now catched and reported
Reference application reads IP-Core version numbers
Improved USB 2.0 FTDI performance for small transfers
Reference application now also supports PCIe
Bugfix for FX3 blocking events
1.21 30.03.2015 Added Long-Term Tests to C# Reference Design
Fixed PCIe closing behavior (note that Driver version 1.01 is required)
Changed default value for open FX3 transfers to 2 (was 128 before)
Fixed some error messages which were misleading
1.22 11.04.2015 Added status readout and status callbacks in C#
Implemented software slave functionality
1.23 21.07.2015 Added Properties vor UniSCP Vendor and Product ID
Reference Application log can now be stored to a file
Bugfix for PCIe memory leak
Fatal errors of internal threads are now also written to the trace
Fixed memory leak for C# API
1.24 23.09.2015 The updated Cypress FX3 driver is now supported
Bugfix for wrongly reported exception in user callback
1.25 14.01.2016 Cypress FX3 firmware updated to support Enclustra MCT
Changed VID and PID input in FX3 device URL from decimal format to hex
1.26 29.03.2016 Bugfix for access violation that happened on multiple consecutive open/close calls
Bugfix for Segfault on Device Creation on Linux
1.27 26.05.2016 Bugfix for memory leak on repeated open/close for streams on Linux
Bugfix for handle leak on repeated open/close for streams on Windows
Removed dependencies between send and receive (the can now be called at the same time in parallel)
1.28 12.01.2017 Implemented PCIe Linux Support
Added possibility to interpret error codes in C#
Stability Improvement for UDP on Windows
Fixed PCIe bug: System blocked on fast consecutive open()/close() calls
1.29 10.08.2017 Fixed bug in error trace generation
Changed PCIe Driver Interface (PCIe Driver > 2.0 required)
1.30 05.12.2017 Reduced resource usage
Bugfixes in FX3 implementation
1.31 20.08.2018 .NET Core / Standard 2.0 API for Windows and Linux -> replaces previous C# interface and wrappers
Visual Studio 2017 support
Visual Studio 2010 no longer supported
NuGet packages for easy integration
FTDI DLL no longer required
MM continuous data transfer stall fixed
Shiny new Demonstrator and demo code
UniSCP Keep-Alive currently disabled, this feature is very unstable and needs to be fixed.

Installation

To run FPGA Manager you have to perform the follwing installation steps.

Windows

Supported Windows Versions:

  • Windows 10
  • Windows 7
  • Server 2016
  • Server 2012

Installation procedure:

  • Get your Visual Studio 2017/2015 or Visual Studio Code ready.
  • Add the appropriate NuGet Package to your project
    • Enclustra.FPGAManager.ApiDotNet for .NET projects
      • Any-CPU Platform is not supported, since the base API is processor architecture dependent.
    • Enclustra.FPGAManager.ApiCpp for C++ projects
      • The runtime linkage has to be configured in the FPGA Manager NuGet project settings and must match that of the project.
    • Enclustra.FPGAManager.AnsiC for pure C projects

Linux

Supported Linux Distributions:

  • Ubuntu 18.04 LTE
  • Ubuntu 16.04 LTE

Installation procedure on 18.04 LTE:

  • For C applications, define BUILD_LIN38
  • To successfully build the reference application, execute the following commands in a terminal:
    • sudo apt install g++ g++-multilib

Installation procedure on 16.04 LTE:

  • For C/C++ applications, define BUILD_LIN38
  • To successfully build the reference application, execute the following commands in a terminal:
    • sudo apt-get install lib32gcc1 libc6-i386 lib32z1 lib32stdc++6
    • sudo apt-get install lib32asound2 lib32ncurses5 lib32gomp1 lib32z1-dev lib32bz2-dev
    • sudo apt-get install g++-multilib
    • sudo apt-get install eclipse-cdt

Overview

General

The FPGA manager allows communication with an FPGA over different interfaces including Ethernet, USB and others. The idea of this product is to supply all the functionality for data transfers between a host PC and an FPGA to be used in different applications.
Basically FPGA manager supports memory mapped accesses and streaming transfers. Transfer options include bursting/non-bursing access, access to continuous addresses or accessing the same DWORD address multiple times for memory mapped accesses. Both, streaming transfers and memory mapped accesses, can be exuted blocking or non-blocking. For the latter case a transfer object can be used to observe the progress of the transfer and call callback functions on completion.

Terminology

Term Description
Device An FPGA connected to the host PC via a link.
Link Connectivity between FPGA and host PC (e.g. USB, Ethernet).
Slave The target endpoint of the FPGA Manager, usually the FPGA.
Stream FPGA Manager supports up to 16 independent streams between host PC and FPGA.
Each stream can be uni- or bi-directional.
Master The controlling endpoint of the FPGA Manager, this is the FPGA Manager Software Library running on the host PC.
Memory Mapped Access Memory mapped access is realized via a special protocol sent over a normal stream.

API

Classes

The API concept is the same for .NET and C++, there is a main API object that is instantiated for each link that the application wants to communicate with. The main API then can be used to create the required streams and memory mapping. With single Open() call the connection to all those streams is established. Connection is closed and resources free'd when the main API object is disposed / destructed.

Main API and interfaces in .NET

Main API and interfaces in C++

Deployment

The FpgaManager.dll is required for all application types and contains the base API. This DLL is processor architecture dependent and is available for x86 and x64. The FpgaManagerDotNet.dll is a .NET standard assembly that provides an easy to use interface for .NET projects similar to the C++ abstraction. This assembly runs on Windows and Linux.

Windows ANSI-C C++ .NET
FpgaManager.dll Yes Yes Yes
FpgaManagerDotNet.dll No No Yes
Linux ANSI-C Static ANSI-C shared C++ .NET
FpgaManager.so No Yes Yes Yes
FpgaManagerDotNet.dll No No No Yes

Examples

Code Example

The code examples gives a good overview over the general usecase of the FPGA manager framework.